The present invention generally relates to a method for testing integrated circuit (IC) chips with probe needles on solder bumps and more particularly, relates to a method for testing IC chips with probe needles on solder bumps that have substantially flattened top surfaces for ease of probing and IC chips that have flattened solder bumps planted on top.
In the fabrication process for IC devices, wafer probing is currently practiced after the evaporated solder has been reflowed such that lead and tin which are deposited sequentially can be properly mixed. In the electroplating deposition process, lead and tin are deposited simultaneously to form an alloy. However, the surface as deposited is rough and soft, thus making it difficult to probe with probe needles. A reflow process is therefore required to produce a smooth, spherical surface for the probe needles. After the reflow process is carried out, the shape of the solder bumps becomes spherical. This is shown in FIG. 1.
The solder ball 10 shown in FIG. 1 presents a probing target that is difficult to contact. The difficulties encountered are two fold. First, as a spherical shape shown in FIG. 1, there is a rapid variation in the Z height for a small change in the X-Y plane, i.e., the distance B shown in FIG. 1. The large variation in Z height requires that both the probe wires and the solder balls be extremely well aligned. When a probe wire, or needle, is slightly misplaced in the X-Y plane from the exact center of the solder ball 10, the probe wire must travel much further in the Z direction to contact the solder ball 10 due to its spherical shape. Secondly, if a solder ball is significantly below the specified volume, as shown in FIG. 2 where solder ball 20 has a lower than specified volume, the probe wire 22 must travel further in the Z direction to contact the top surface of the solder ball 20. Both of the above described problems require the probe wire to be overdriven, or the entire probe head to be overdriven, such that all the probe wires are pushed harder against their solder ball targets so that the probe wires for either a low volume or an off-center ball still hit their target. This presents another processing problem in that since most solder balls are of the proper size and in the correct location, overdriven probe wires can damage these solder balls excessively due to the extra mechanical force required to contact problem balls. This may even result in solder sticking to the probe wires when the probe pad is withdrawn from the wafer, or the chip. This both contaminates the probe head and affects the solder ball volume uniformity. It is therefore desirable to provide an improved chip or wafer testing method in which probe wires are used to contact solder bumps before the bumps are reflown into solder balls. The solder bumps ideally should have a consistent Z height and increased target area for contacting by the probe wires.
It is therefore an object of the present invention to provide a method for testing IC chips with probe wires that does not have the drawbacks or shortcomings of the conventional test methods.
It is another object of the present invention to provide a method for testing IC chips with probe wires by providing an IC chip with a multiplicity of solder bumps on an active surface wherein the bumps each having a height less than xc2xd of its diameter.
It is a further object of the present invention to provide a method for testing IC chips with probe wires on flat solder bumps in which a multiplicity of solder bumps is planted by a technique of evaporation, electroplating, injection molded solder or molten solder screening.
It is another further object of the present invention to provide a method for testing IC chips with probe wires on solder bumps that have substantially flattened top surfaces such that an increased target area is available for contacting the probe wires.
It is still another object of the present invention to provide a method for testing IC chips with probe wires on substantially flattened top surfaces of solder bumps by first forming the solder bumps with a soft solder material and then planarizing the bumps by a platen with a planar surface.
It is yet another object of the present invention to provide a method for testing IC chips with probe wires on substantially flattened top surfaces of solder bumps wherein the solder bumps are deposited in an in-situ solder mold forming pancake-like solder bumps by an electroplating or molten solder screening technique.
It is still another further object of the present invention to provide an IC chip that has substantially flattened solder bumps on an active surface and the bumps are formed in flattened hemi-spherical shape on a multiplicity of bond pads wherein each of the bumps has a height less than xc2xd of the maximum diameter of the hemi-spherical shapes.
It is yet another further object of the present invention to provide an IC chip that has flat solder bumps on an active surface wherein the bumps are formed in cylindrical shape on a multiplicity of bond pads with each of the bumps having a height less than xc2xd of the diameter of the cylindrical shape.